NanoST Lab

Led by Prof. Tuo-Hung (Alex) Hou, in NanoST Lab, we believe successfully bridging the maturity of CMOS technology and the exciting opportunities offered by the emerging nanoscale science and technology is the key for continuing the remarkable run of Moore’s Law. We in particular emphasize co-innovation across Physics, Materials, Devices, Circuits, Algorithms, and Systems for promoting new paradigm shifts in semiconductor technology.

We welcome motivated undergraduate, master, and PhD students who are interested in semiconductor devices, circuits, and applications to join us.

Latest News

  • 06/2026
    Cheng-Yi presented Origin and Modeling of the Access-Rate-Dependent Degradation and Dual-Interface Optimization in Ultra-Thin Nanolaminate HZO in 2026 VLSI. Fabulous!
  • 12/2025
    Tung-Lin presented Direct Atomic Layer Processing TiO2 RRAM Gas Sensor for Real-time All-RRAM Intelligent Gas Perception in 2025 IEDM. Congratulations!
  • 12/2024
    Chen-Yu presented Dual-Function Unipolar pSOT-MRAM in 2024 IEDM. Thumbs up!
  • 12/2023
    Cheng-Yi presented Ultrathin HZO Ferroelectric Wake-up Mechanism in 2023 IEDM. Congratulations!
  • 06/2022
    Ming-Chun presented 4k-400k wide-operating-temperature STT-MRAM in 2022 VLSI. Congratulations!
  • 09/2021
    Ming-Chun’s breakthrough research on In-memory annealing unit has been accepted in IEDM 2021. Fabulous!
  • 08/2021
    Chih-Sheng’s research on 20943 TOPS/W IMC accelerator has been accepted in ASSCC 2021. Thumbs up!